Xpedion Design Systems releases Goldengate™ 3.4 further increasing RFIC designer productivity PRESS RELEASE For more information contact: Nelson Seiden Cindi R. Maciolek Xpedion Design Systems Grand Arbor Press Tel: 1.408.449.4035 Tel: 1.702.341.5395 Email: nelson@xpedion.com Email: cindi@grandarbor.com http://www.xpedion.com XPEDION DESIGN SYSTEMS RELEASES GOLDENGATE™ 3.4 FURTHER INCREASING RFIC DESIGNER PRODUCTIVITY New release reduces design time through capacity, convergence And capability improvements MILPITAS, Calif ., October 25, 2004 - Xpedion Design Systems, the RFIC simulation company, today announced the immediate availability of its GoldenGate Simulator version 3.4. This latest release offers remarkable leadership in capacity, convergence and capability over other RF simulators. Designers can now perform more simulations at the transistor level using real-world modulated signals than previously possible in any simulation environment. GoldenGate 3.4 has an increased capacity of 50 percent over version 3.3, yielding convergence on circuits with over 10,000 active devices and 1,000,000 parasitic devices. Furthermore, speed has been increased by over 40 percent, allowing designers to run more simulations in less time and get to market sooner. “Meeting demanding specifications for highly integrated radios is a primary driver for new RFIC designs,” said Pete Johnson, product manager at Xpedion. “Our goal is to enable developers to efficiently design these highly integrated IC's and have confidence that they will work prior to tape-out.” This release also introduces new capabilities to the designer. GoldenGate’s use of native Spectre™ design kits now includes automatic compilation of Verilog-A models. A simple to use and automated EVM (error vector magnitude) calculation, allows designers to quickly obtain this popular figure of merit. Support for LSF allows designers to efficiently utilize compute farms for increased characterization. Finally, improvements in the core algorithms greatly increase convergence on large circuits. These added capabilities shorten design cycle time by dramatically increasing designer productivity. About GoldenGate The GoldenGate RFIC simulator has been developed specifically for RFIC designers who wish to perform advanced simulation and analysis. GoldenGate is completely integrated with Cadence's Analog Design Environment (ADE) and uses Spectre ™ Process Design Kits natively without the need for translation. Its capacity and performance provides RFIC designers the ability to automatically analyze ACPR, EVM, Gain Compression, SSNA, IP3 and many other analyses in minutes at the transistor level. Complete transceivers can be simulated with industry standard modulated sources. GoldenGate is powerful enough to simulate designs with over ten thousand (10,000) active devices and over one million (1,000,000) post parasitic elements. Foundry-proven accuracy ensures higher yields and fewer design spins. About Xpedion Design Systems Xpedion delivers the most advanced RFIC simulation technology in the industry. This enables RFIC designers to analyze their designs at the transistor level faster and more accurately. The benefits are measured in shorter design cycles, reduced silicon spins and higher performing products. Xpedion is a member of the Cadence (NYSE: CDN - News ) Connections Program, the Mathworks Partners Program, the Platform Partners Program, and is a Sun Microsystems (Nasdaq: SUNW - News ) development partner. Xpedion's products are also available on the Red Hat (Nasdaq: RHAT – News ) Linux operating system. Xpedion Design Systems, Inc. is located at 1900 McCarthy, Suite 210, Milpitas, California, USA, 95035. Telephone: 408/449-4000, FAX: 408/449-4030, email: info@xpedion.com, www.xpedion.com . %%# TRADEMARKS GoldenGate/Sim and GoldenGate/Model Compiler are trademarks of Xpedion Design Systems. All other trademarks are the property of their respective owners. ©2004 Xpedion Design Systems, Inc.